Too many engineers and product designers do not start thinking about electrostatic discharge (ESD) immunity until their products are almost ready to be released to production. Then, when the equipment fails the ESD immunity tests, they find themselves working gobs of overtime trying to find fixes that don't tear up the design. But all too often the fixes that they finally come up with require expensive parts and lots of hand assembly in manufacturing or a complete redesign that blows the product schedule.

Even experienced engineers and designers may not know which aspects of their designs help the ESD immunity and which items just add cost. The major problem is a seeming dearth of information on designing electronic equipment for ESD immunity. A lot of information available on ESD control covers protecting products from destruction and latent damage during manufacturing, shipping, installation and servicing. But only a few books explicity address designing equipment for ESD immunity, and the rest of the information on the subject is scattered through over 200 publications spanning 25 years.

Most electronic equipment will spend 99% of its useful life in environments where it is subject to ESD from humans, furniture and even from inside the equipment itself. Here, outright ESD damage is rare but ESD upsets-using only about 10% of the energy that ESD damage requires-are very common, causing the equipment to lock up, reset itself, lose data, or otherwise act weird and unreliable. The result is many "no trouble found" repair calls during cold, dry winter weather and a loss of customer confidence in the equipment and its manufacturer.

Where ESD originates

To fight ESD, we first must know what it is and how it gets into our equipment. Basically, ESD can happen anytime a charged conductive object approaches another conductive object. First, a strong electric field forms between the objects, which can cause feld-induced breakdown. Then an arc can occur when the voltage between the objects exceeds the breakdown voltage of the air and the insulation between them. In 0.7 to 10 ns, the current in this arc can reach tens of amps, sometimes exceeding 100 amps. The arc continues until the objects touch, shorting out the arc, or until the current drops too low to sustain the arc.

Depending on the initial voltage, resistances, inductances, and parasitic capacitances of the objects:

• One arc may occur (human body model, charged device model, machine model).
• One arc with an initial spike may occur (hand/metal model).
• Multiple arcs of the same polarity or alternating polarities may occur (furniture model).

ESD can find its way into electronic equipment through five coupling paths:

1. An initial electric field can capacitively couple to nets with a large surface area, looking like a signal to high-impedance analog circuits (rarely), and generate up to 4000 V/m 100 mm from the ESD arc.
2. Charge/current injected by the arc can:
   • Break through thin insulating layers inside components, damaging the gates of MOSFETs and CMOS devices (very common).
   • Trigger latch-up in CMOS devices (common).
   • Short-circuit reverse-biased PN junctions (common).
   • Short-circuit forward-biased PN junctions (rare).
   • Melt bonding wires or aluminum traces inside active devices (rare).
3. Current causes a voltage pulse on conductors (V = L * dI/dt), whether they are power, ground, or signal wiring, and gets into every device attached to that net (common).
4. An intense magnetic field from the arc has a frequency range of about 1 MHz to 500 MHz, which inductively couples into every wiring loop in the vicinity, as high as 15 A/m 100 mm from the ESD arc.
5. A magnetic field radiates from the arc, becoming an electromagnetic field, which couples into long wires that act as receiving antennas (rare).

The result is that ESD searches our equipment for weak points by a variety of coupling paths. Because it is broadband, not just discrete frequencies, it can get into even narrowband circuits. To prevent ESD upset/damage we must close off these paths or harden ESD's targets. Table 1 illustrates the types of defenses available to us and in which cases they are effective.

Table 1: Defenses Against ESD

	ESD Coupling Path					ESD Target
Defense	Capacitive Coupling	Charge Injection	Common- Impedance Coupling	Inductive Coupling	Radiated Coupling	Inputs	Outputs	Power	Ground	Memory/ Registers
Plastic enclosure	X	X	X	X		X	X	X	X	X
Air space	X	X	X	X		X	X	X	X	X
Insulation		X	X			X	X	X	X	X
Metal enclosure	X	X	X	X	X	X	X	X	X	X
Shielding	X	X	X	X	X	X	X	X	X	X
Grounding/ bonding	X	X	X	X	X	X	X	X	X	X
Power distribution		X	X	X	X			X	X	X
Bypassing/ decoupling		X	X	X				X		X
PCB design/ mounting	X	X	X	X	X	X	X	X	X	X
Cable design/ routing	X	X	X	X	X	X	X	X	X	X
Circuit design		X	X			X	X	X	X	X
Filters	X	X	X	X	X	X	X	X		X
Transient suppressors		X	X	X	X	X	X	X		X
Robust components		X	X			X	X	X	X	X
Watchdog timers						X	X			X
Software						X	X			X

The best offense: a good defense

Plastic enclosures, air space and insulation can prevent ESD arcs to our equipment. Except for distance, they provide no protection against ESD arcs outside the equipment (indirect ESD). To establish a breakdown voltage of 20 kV against ESD:

A1 Ensure >= 20 mm path length between the electronics and:

• Any points that the user can touch, including seams, ventilation openings and mounting holes. At a given voltage, arcs can travel farther over the surface of a dielectric than they can through open air.
• Any ungrounded metal that the user can touch-fasteners, switches, controls, and indicators.

A2 Recess the electronics in the enclosure, or use tongue-in-groove or shiplap joints to increase the path length at seams.

A3 Cover seams and mounting holes with Mylar tape inside the enclosure, extending past the edge of the seam/hole, to increase the path length where clearance is limited.

A4 Cover unused or rarely used connectors with metal caps or insulating plastic dust covers.

A5 Use switches and controls with plastic shafts, or put plastic knobs or "tophats" on them, to increase the path length. Avoid knobs with metal setscrews.

A6 Recess LEDs and other indicators, cover them with tape or caps extending past the edge of the holes, or use lightpipes to increase the path length.

A7 Extend the border on membrane keyboards >= 12 mm outside the metal traces, or use a plastic bezel to increase the path length.

A8 Round the corners and edges on heatsinks and other metal parts that are close to seams, ventilating holes or mounting holes in the enclosure.

A9 Do not let metal fasteners protrude inside a plastic enclosure if they will be anywhere close to the electronics or ungrounded metal.

A10 Put taller feet on a product to raise it off the table/floor if the product fails indirect ESD tests to the table/floor or horizontal coupling plane.

A11 On tactile rubber keypads, keep the traces in tight and extend the rubber pieces to increase path length.

A12 Use adhesive/sealant around the circuitry layers of membrane keyboards.

A13 Use a high-voltage-proof silicone or poron gasket to provide an airtight, ESD-proof, waterproof, dustproof seal between pieces of the enclosure.

Enclosures and shielding

Metal enclosures and shielding can intercept ESD arcs and their electric and magnetic fields, and provide protection from indirect ESD. Our goal is to keep all ESD outside the enclosure. Ungrounded enclosures should have at least a 20 kV breakdown voltage to susceptible electronics (see previous rules A1 through A9). Grounded enclosures should have at least a 1500 V breakdown voltage to the electronics to prevent secondary arcs, requiring a path length >= 2.2 mm.

For shielding to be effective against ESD:

B1 Design plastic enclosures with provisions for adding shields made of the following materials if needed:

• Sheet metal.
• Mylar/copper or Mylar/aluminum laminate.
• Thermoformed metal mesh with bonded junctions.
• Thermoformed metallized fiber mat (unwoven) or fabric (woven).
• Silver, copper or nickel paint.
• Zinc arc spray.
• Vacuum metallizing.
• Electroless plating.
• Conductive filler in the plastic.
• <= 1 ohm/square resistance. Joints and edge treatment are critical, as are arrangements for connecting bonding jumpers/wires.

B2 Choose a material with high conductivity (low resistivity). See Table 2.

Table 2: Galvanic Series

Material	electromotive force (EMF), Volts	Resistivity Nano-ohm-meters
Magnesium	(anodic, corrodes) +2.37V	42
Magnesium alloys		50-175
Aluminum	+1.66V	27
Zinc	+0.76V	60
Galvanized steel		100-197
Aluminum alloys		27-86
Chromium	+0.74V	132
Cadmium	+0.40V	73
Mild steel	+0.44V	100-197
Iron	+0.44V	101
Tin-lead solder		145-195
Stainless steel (active)		560-780
Lead	+0.13V	206
Tin	+0.14V	126
Nickel	+0.25V	69
Brass		61-110
Beryllium copper		29-115
Copper	-0.34V	17.2
Bronze		91-212
Monel		510-614
Silver solder		22-172
Stainless steel (passive)		560-780
Titanium alloys		482-1700
Silver	-0.80V	16
Titanium	+1.63V	540
Gold	-1.50V (cathodic, passive)	22

B3 Choose shield materials, fastener materials and gasket materials to minimize corrosion. See Table 2:

• Parts that will be in contact should have electromotive forces (EMFs) within 0.75 V of each other, or within 0.25 V if they will be used in a salt spray environment.
• The anodic (positive) part should be larger than the cathodic (negative) part.

B4 Overlap the seams in shields by >= 5 times the gap.

B5 Electrically connect the seams in shields about every 20 mm (0.8") by welds, fasteners, dimples, or fingerstock.

B6 Use gaskets to bridge seams, eliminating slots and providing similar conductivity across seams as in the rest of the shield.

B7 Avoid nicks, cracks and thinning of the shield.

B8 Avoid sharp bends and sharp corners in shields.

B9 Keep holes <= 20 mm in diameter and slots <= 20 mm long. Holes are preferrable to slots if open area is important.

B10 Put a secondary shield between controls and indicators that require large openings and susceptible electronics.

B11 Use several small openings instead of one big opening if you can.

B12 Space openings apart by their largest dimension if possible.

B13 Connect shields to chassis ground at the connector entry point for grounded equipment.

B14 Connect shields to circuit common near switches for ungrounded (double-insulated) equipment.

B15 Put a ground plane or secondary shield (metal or copper/Mylar laminate) parallel and close to the electronics, and bent up so that it can connect to chassis ground or circuit common at the cable entry point.

B16 Put cable entry point near the center of a panel instead of near an edge or corner.

B17 Line up slots in a shield so they are parallel to the direction that ESD currents will flow.

B18 Install a local shield under horizontal boards and backplanes if indirect ESD is a concern:

• Connect to chassis ground or circuit common at the power connector and at connectors going to the "outside world."
• Use sheet metal with metal standoffs for additional ground points at mounting holes, or with plastic standoffs for isolation.
• Lay Mylar/copper or Mylar/aluminum laminate under the board/backplane, with a tab that is clamped between the enclosure and the metal body of a connector-cheap, easy to prototype.
• Use conductive coating or conductive filler in the bottom pan (see B1).

B19 Install local shields inside plastic enclosures at control panels and keyboards to intercept ESD:

• Connect to chassis ground or circuit common at the power connector and at connectors going to the outside world.
• Use sheet metal so that small high-frequency capacitors may be soldered between the shield and the connections to switches/controls/indicators.
• Use a Mylar/copper or Mylar/aluminum laminate, a conductive coating or conductive filler in the plastic.

B20 Use thin conductive alodine, iridite or chromate coatings on aluminum, but not anodizing.

B21 Aim for >20-40 dB of shielding effectiveness.

B22 Mask off or remove anodizing and paint from seams, joints and connectors.

B23 Weld joints in stainless steel to provide adequate continuity.

B24 Use special inserts in plastics with conductive fillers. The surfaces of molded parts are usually resin-rich, making low-resistance joints hard to achieve.

B25 Use thin conductive chromate coatings on steel.

B26 Do not depend on hinges or screws to bond metal parts together. Instead, force clean metal surfaces into direct contact.

B27 Add a ground plane next to a double-sided card, connecting it to ground points on the card at close intervals.

B28 Bond displays with a shielding coating (indium tin oxide, indium oxide, tin oxide, etc.) to the enclosure shield around the entire periphery.

B29 Provide an anti-static (weakly conducting) path to ground at a point that the operator will touch frequently, such as the space bar on a keyboard.

B30 Make it difficult for an operator to arc to a corner or edge of a plate. Arcs to these points cause more indirect ESD than arcs to the center of plates.

B31 Put a grounded conductive layer between the face place and the circuits on membrane keyboards.

Grounding and bonding

The current from an ESD arc first charges the parasitic capacitance of the metal it hits, and then it follows every conductive path available. This current prefers to flow in sheets, or short, wide straps, instead of wires. Bonding establishes low-impedance paths between pieces of metal, minimizing the voltages between them, while grounding provides a path to eventually drain off the accumulated charge. For grounding and bonding to be effective against ESD, keep the ESD current density and ESD current path impedance as low as possible.

C1 Use multipoint grounds where you want ESD current to flow.

C2 Use single-point grounds where you don't want ESD current to flow.

C3 Connect metal portions of the enclosure to chassis ground.

C4 Bring chassis ground to within 40 mm (1.6") of each cable entry point.

C5 Connect connector housings and metal switch housings to chassis ground.

C6 Put a wide conductive guard ring all around a membrane keyboard, connected to the metal enclosure around the periphery, or at least connected at all four corners. Do not terminate this guard ring to the circuit ground on a PCB.

C7 Connect L-C or ferrite bead-C filters on connector signals to chassis ground close to the connector.

C8 Keep uninsulated chassis ground >= 2.2 mm from the electronics.

C9 Put a ferrite bead between chassis ground and circuit common.

C10 Keep bonding jumpers short and wide, with <= 5:1 length:width ratio, if possible.

C11 Use multiple bonding jumpers if you can. Avoid concentrating the ESD current.

C12 Keep bonding jumpers and wires well away from susceptible electronics or their cables.

C13 Choose materials for bonding jumpers and wires, and the fasteners/fastening methods to minimize corrosion. See Table 2:

• Parts that will be in contact should have EMFs within 0.75 V of each other, or within 0.25 V if they will be used in a salt spray environment.
• The anodic (positive) part should be larger than the cathodic (negative) part.

C14 Ground the metal shafts of controls to the shield with grounding fingers or conductive bushings.

C15 Keep bonding straps and wires away from ESD-susceptible PCBs.

C16 Supplement hinges with bonding straps or wires.

C17 Bond metal pieces that don't need to come apart by welding, brazing, sweating or swaging. (A swage is a tool used to shape metal.)

C18 Bond metal pieces that must come apart for operation/service by:

• Direct metal-to-metal contact between clean surfaces, held in intimate contact by compressed Belleville washers or tensile preload between the bolts and other mounting hardware.
• Direct contact between metal surfaces with thin conductive coatings, held in intimate contact.
• Outside-star washers compressed between the metal pieces, to pierce paint, grease and other insulating films.

C19 Prefer solid bonding straps to braided bonding straps.

C20 Protect bonds from moisture.

C21 Use multiple conductors to bond together the ground planes/ground grids of all the boards inside an enclosure.

C22 Make bonds and gaskets >= 5 mm wide.

Protecting the power

The power distribution system inside electronic equipment is a prime target for inductive coupling from an ESD arc. The following steps will help protect power distribution systems against ESD:

D1 Tightly twist power wires and their returns together.

D2 Put a ferrite bead in each power line at its entry point to the electronics.

D3 Put a transient suppressor, metal oxide varistor (MOV) or high-frequency 1 kV capacitor between each power pin and chassis ground close to the electronics.

D4 Prefer power planes and ground planes on PCBs, or tight power and ground grids, with plenty of bypassing and decoupling capacitors.

Layout for fighting ESD

The stackup, layout, and mounting of PCBs can be a very potent weapon against ESD, incorporating and being affected by all the other types of defenses mentioned. Reaching our desired ESD immunity usually takes several test-fix-retest cycles, each of which may affect at least one PCB. By looking ahead during the PCB design, we can limit most of these changes to the addition or removal of components.

To layout PCBs with maximum immunity to ESD:

E1 Use multilayer PCBs if possible:

• The ground and power planes, and tight signal-ground spacing, can reduce common impedance and inductive coupling by 10-100 times over double-sided PCBs.
• Try to position each signal layer next to a ground layer or power layer.
• On very dense PCBs consider using "submerged traces" where the top and bottom surfaces have components, very-short traces, and lots of ground infill. Most of the signal wiring-along with the power and ground grids-is on the inner layers essentially encased in a Faraday cage.

E2 Use tightly interwoven power and ground grids on double-sided PCBs, with:

• Power traces next to ground traces.
• As many connections between vertical and horizontal traces/infill as possible.
• Grids <= 60 mm on a side.
• Grids < 13 mm (0.5") on a side if possible.

E3 Keep each circuit/section of circuitry as compact as possible.

E4 Put all connectors on one edge if possible.

E5 Bring power into the center of the card if possible, away from areas that can be directly hit by ESD.

E6 Put wide chassis ground traces or polygons in all layers of the PCB under connectors that go to the outside world (risking a direct hit by ESD), and tie them together about every 13 mm by vias.

E7 Put mounting holes on the card edge that goes to the outside world, circled by vias and with soldermask-free topside and bottomside pads connected to chassis ground.

E8 Do not put any solder on these topside or bottomside pads during PCB assembly. Use screws with built-in Belleville washers to draw the PCB into tight contact with mounting tabs or standoffs on the metal enclosure/shield/ground plane.

E9 Put an identical "moat" between chassis ground and circuit ground on each layer, separating them by 0.64 mm (0.025") if possible. You should be able to hold a completed card up to the light and see this moat crossed only by the traces going to the connector pins.

E10 Connect chassis ground to circuit ground by ground ties, 1.27-mm-wide (0.050") traces, on the topside and bottomside of the card close to the mounting holes and about every 100 mm (4.0") along the chassis ground trace. Put pads or mounting holes for ferrite beads between chassis ground and circuit ground next to these ground ties. These ground ties can be cut with an exacto knife and left open or jumpered with a ferrite-bead/high-frequency capacitor to change the grounding scheme during ESD testing.

E11 If the board will not be going into a metal enclosure or shield, leave soldermask off the topside and bottomside chassis ground traces so that they can act as lightning rods to ESD arcs.

E12 Put a ground ring around the card in the following manner:

• Place ground ring around the entire periphery, except for edge-tab connectors and sections with chassis ground.
• Make it >= 2.5 mm wide (0.1") in all layers.
• Stitch together with vias about every 13 mm (0.5").
• Connect to circuit common in multilayer cards.
• Connect to circuit common in double-sided cards that will be installed in a metal enclosure or shield.
• Connect to chassis ground in double-sided cards that will be left unshielded. Leave solder mask off this ground ring so it can act as a lightning rod to ESD, and put at least one 0.5-mm-wide (0.020") gap somewhere in the guard ring (in all layers) so that it doesn't form a large loop.
• Run signal traces no closer than 0.5 mm to this guard ring.

E13 Run a ground trace next to each signal trace in areas that can get directly hit by ESD.

E14 Place I/O circuits close to their connectors.

E15 Put ESD-susceptible circuits close to the center of the card, so that the other circuits provide some free shielding.

E16 Usually place series resistors and ferrite beads at the receiver end, but consider placing series resistors/ferrite beads at drivers to cables that may be hit by ESD.

E17 Usually place transient protectors at the receiving end:

• With a short, fat trace to chassis ground (length < 5 * width, preferably < 3 * width).
• Routing the signal and ground traces from the connector directly to the transient protector and then to the rest of the circuit.

E18 Place filter capacitors either at the connector or within 25mm (1.0") of the receivers:

• With a short, fat trace to chassis ground or the receiver's ground (length < 5 * width, preferably < 3 * width).
• Routing the signal and ground traces to the capacitor, then to the receiver.

E19 Keep signal traces as short as possible.

E20 Parallel signal traces over 300 mm (12") long by a ground trace.

E21 Keep the loop area between signal traces and their returns as small as possible. For long traces consider transposing the positions of the signal trace and ground trace every few centimeters or inches to reduce the loop area.

E22 Drive signals going to multiple receivers from the center of the nets.

E23 Keep the loop area between power and ground as small as possible. Put a high-frequency capacitor close to each power pin on an integrated circuit.

E24 Put a high-frequency bypass capacitor within 80 mm (3") of each connector.

E25 Fill in unused areas (where permitted) with ground, interconnecting the layers at least every 60 mm.

E26 Make sure that any large patch of ground infill (larger than about 25 mm x 6 mm (1" x 0.25") has at least two connections to ground at opposite ends.

E27 If accidental slots in ground and power planes are longer than about 8 mm (0.3"), use narrow traces to stitch together the sides.

E28 Put vias solid into power planes and ground planes. Plated through-holes for components will still require thermal vias.

E29 Do not run resets, interrupts or edge-triggered signals close to the edge of the PCB.

E30 Provide a way to connect mounting holes to circuit common, or to leave them isolated:

• Use zero-ohm resistors if metal standoffs must be used with a metal shield or enclosure.
• Size mounting holes to take metal or plastic standoffs, provide large pads on the topside and bottomside with the soldermask left off, and make sure that the bottomside pads don't get wavesoldered.

E31 Do not run protected signals parallel to unprotected signals.

E32 Pay special attention to resets, interrupts and control signals:

• High-frequency filtering.
• Keep away from input/output circuits.
• Keep away from edges of board.

E33 Mount PCBs so they are inset into the enclosure, not in line with slots or inside seams.

E34 Be careful about running traces under ferrite beads or between pads that could get ferrite beads. Some ferrites are fairly conductive, and could create unintended connections.

E35 If a card cage or motherboard contains several cards, put the most sensitive cards toward the center.

Continue to Part II

We'd like to thank all of the clients who chose dBi to test their products from 1995 to 2013. Below is a brief summary of our accomplishments during the 18 years we were in business.

From 1995 to 2001, under Don Bush's ownership and operation, dBi:

• Did the official approval testing of 141 products developed by 20 client companies.
• Did the official FCC/ Industry Canada (IC) Verification and Declaration of Conformity (DoC) testing of 92 products.
• Did the official FCC/IC Certification testing of 15 products.
• Did the official CE Marking testing of 100 products.

From 2002 to 2013, under John Barnes' ownership and operation, dBi:

• Tested 389 products and 2 testers developed by 44 client companies.
• Did the official approval testing of 357 products and 2 testers, getting all but 5 of them to meet all of the FCC, Industry Canada (IC), CE Marking, C-Tick, and Regulatory Compliance Mark (RCM) standards and requirements for their desired market areas.
• Did the official FCC/IC Verification and Declaration of Conformity (DoC) testing of 296 products.
• Did the official FCC/IC Certification testing of 24 products.
• Did the official CE Marking testing of 271 products and 2 testers.
• Did the official e-Mark testing of 3 products.
• Did the official Australia/New Zealand Verification testing of 170 products.
• Co-sponsored John's writing the Robust Electronic Design Reference Book, Volumes I and II.
• Served as an expert witness on electronics in three lawsuits.

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Last revised December 19, 2010.